#09UPS System Inspection
Multi-Asset / Multi-Point Equipment Schedule
Inspect multiple transformers, panels, rooms, motors, or RCDs in this module without overwriting previous assets. Each item receives a permanent QR Sticker UID preserved across annual audits.
Sticker UID: OC-UPS0-71F9Standard Limits, Equations & Space Presets
IEC 62040-3 VFI-SS-111 (Online Double Conversion) output voltage regulation, THD limits under linear and non-linear reference loads, quarter-cycle static transfer, and IEEE 1188 autonomy verification.
Measured Inputs
Calculated / Evaluated Results
Acceptance: IEC 62040-3 output performance (regulation and THD selected by load type), static transfer inside a quarter cycle, and measured autonomy compared with the design runtime (IEEE 1188 / NETA ATS 7.28).
Pending / Not tested — results stay neutral until valid measured values are entered.
- Pending
Active Output Apparent Power
-
For Tier III / Tier IV 2N dual-corded architectures (ANSI/TIA-942), keep each UPS below 45% so a single bus trip stays under 90%.
- Pending
Load Level
- %
Not tested - enter the measured value. Acceptance: Keep <= 80% to retain redundancy and step-load headroom [ANSI/TIA-942 / IEC 62040-3 practice]
- Pending
Autonomy vs Design Runtime
-
Not tested - enter the measured value. Acceptance: Measured runtime >= 100% of design; below 90% requires battery replacement planning [IEEE 1188 / NETA ATS 7.28]
- Pending
Output Voltage Regulation
- %
Not tested - enter the measured value. Acceptance: Steady state output within +/-1% (VFI Class 1) [IEC 62040-3]
- Pending
Output Voltage THD
- %
Not tested - enter the measured value. Acceptance: THDv <= 2% for linear load [IEC 62040-3 Annex E]
- Pending
Static Bypass Transfer Time
- ms
Not tested - enter the measured value. Acceptance: Transfer within a quarter cycle (5.00 ms at 50 Hz) so the IT load rides through [IEC 62040-3 / OEM specification]
Verification Checklist (0 / 17)
1UPS double-conversion topology (VFI-SS-111 per IEC 62040-3), firmware revision, and parallel load-sharing config recorded
2Rectifier input, inverter output, and reserve bypass 3-phase voltages and currents within +/-1% steady-state tolerance
3Active load percentage verified <= 80% standalone or <= 45% per bus on 2N dual-corded Tier III/IV architectures [ANSI/TIA-942]
4Inverter-to-Static-Bypass uninterrupted transfer and re-transfer proven within <= 1/4 cycle (4-5 ms) without IT load drop
5Make-before-break Mechanical Maintenance Bypass switch interlock sequence verified and clearly labelled
6Output voltage Total Harmonic Distortion (THDv) verified <= 2% (linear load) or <= 5% (IEC non-linear load)
7DC link float voltage, AC ripple voltage (<= 0.5% RMS), and AC ripple current within IEEE 1188 limits
8Battery circuit breaker (BCB) shunt-trip and undervoltage release mechanism verified functional
9Internal DC link electrolytic capacitors, AC filter capacitors, and cooling fan runtime hours checked against OEM replacement lifecycle
10Air intake dust filters clean and redundant cooling fans operating without bearing noise
11Infrared thermography scan performed on input/output/bypass terminals, contactors, and IGBT heatsinks
12Power cable terminations torque-checked and protective earth (PE) bonding continuity verified
13Backfeed protection contactor / upstream isolation verified to prevent voltage feedback onto de-energised bypass supply [IEC 62040-1]
14Synchronisation tracking window and slew-rate settings verified with upstream generator frequency governor
15SNMP / Modbus / dry-contact BMS alarms (On Battery, On Bypass, Battery Fault, Overload) tested end-to-end
16Emergency Power Off (EPO) contact integration verified (or safely bypassed during live PM with formal permit)
17Measured battery autonomy runtime test compared against design curves and IEEE 1188 >= 90-100% threshold
General Notes
Free plan: 5 of 5 inspections / calculations left this month.